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Glitch-Resistant Masking Revisited - or Why Proofs in the Robust Probing Model are Needed
Side-channel analysis Masking Robust Probing Model
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2018/5/28
Implementing the masking countermeasure in hardware is a delicate task. Various solutions have been proposed for this purpose over the last years: we focus on Threshold Implementations (TIs), Domain-O...
GLITCH: A Discrete Gaussian Testing Suite For Lattice-Based Cryptography
Post-quantum cryptography lattice-based cryptography discrete Gaussian samplers
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2017/5/23
Lattice-based cryptography is one of the most promising areas within post-quantum cryptography, and offers versatile, efficient, and high performance security services. The aim of this paper is to ver...
Extending Glitch-Free Multiparty Protocols to Resist Fault Injection Attacks
secret sharing AES fault attacks
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2017/3/27
Side channel analysis and fault attacks are two powerful methods to analyze and break cryptographic implementations. Recently, secure multiparty computation has been applied to prevent side channel at...
System Clock and Power Supply Cross-Checking for Glitch Detection
System Clock Power Supply Cross-Checking
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2016/12/8
Cryptographic systems are vulnerable to different kinds of fault injection attacks. System clock glitch is one of the most widely used fault injection methods used in different attacks. In this paper,...
GliFreD: Glitch-Free Duplication - Towards Power-Equalized Circuits on FPGAs
side-channel protection FPGA hiding
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2016/1/4
Designers of secure hardware are required to harden their implementations against physical threats, such as power analysis attacks. In particular, cryptographic hardware circuits are required to decor...