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In previous work, Boemer et al. introduced nGraph-HE, an extension to the Intel nGraph deep learning (DL) compiler, that en- ables data scientists to deploy models with popular frameworks such as Tens...
The concrete efficiency of secure computation has been the focus of many recent works. In this work, we present protocols for secure 33-party computation (3PC) tolerating one corruption in the offline...
Two of the most significant challenges in the design of blockchain protocols is increasing their transaction processing throughput and minimising latency in terms of transaction settlement. In this wo...
VeritasDB: High Throughput Key-Value Store with Integrity     key-value store  guarantees data integrity       font style='font-size:12px;'> 2018/3/8
While businesses shift their databases to the cloud, they continue to depend on them to operate correctly. Alarmingly, cloud services constantly face threats from exploits in the privileged computing ...
In this paper, we describe a new information-theoretic protocol (and a computationally-secure variant) for secure {\em three}-party computation with an honest majority. The protocol has very minimal c...
In this paper, we describe a new protocol for secure three-party computation of any functionality, with an honest majority and a \textit{malicious} adversary. Our protocol has both an information-theo...
High throughput in slices: the case of PRESENT, PRINCE and KATAN64 ciphers     PRESENT  PRINCE  KATAN64       font style='font-size:12px;'> 2016/12/8
This paper presents high-throughput assembly implementations of PRESENT, PRINCE and KATAN64 ciphers for the ATtiny family of AVR microcontrollers. We report new throughput records, achieving the spe...
This paper proposes a highly efficient AES hardware architecture that supports both encryption and decryption for the CBC mode. Some conventional AES architectures employ pipelining techniques to enha...
RC4 is the most widely used stream cipher around. So, it is important that it runs cost effectively, with minimum encryption time. In other words, it should give higher throughput. In this paper, a me...
In the last few years, several practitioners have proposed a wide range of approaches for reducing the implementation area of the AES in hardware. However, an area-throughput trade-off that undermin...
HPAZ: a High-throughput Pipeline Architecture of ZUC in Hardware     Stream Cipher  FPGA       font style='font-size:12px;'> 2014/3/11
Abstract.In this paper, we propose a high-throughput pipeline architecture of the stream cipher ZUC which has been included in the security portfolio of 3GPP LTE-Advanced. In the literature, the schem...

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